Engineering
BSc in Artificial Intelligence, Data and Management Sciences (AIDAMS) - ESSEC and CentraleSupélec joint degree
CentraleSupélec, France
- Degree
- Bachelor's
- Next intake
- September
Engineering
Electronic design master co-operated by CentraleSupélec, Télécom Paris and Université Paris-Saclay, taught in English, with courses from September to March focused on projects and practicals followed by an internship from April.
Faculty: Master Électronique, Énergie Électrique, Automatique (Université Paris-Saclay, coordinated by CentraleSupélec) | Study mode: full-time; taught in English | Intake: September | Location: Gif-sur-Yvette, Île-de-France, France
Advanced analogue and digital electronic design: mixed-signal CAD, analogue and RF systems, A/D and D/A converters, sensor interfaces, digital cell design and hardware computing architectures, with a project and an internship.
Prepares future researchers or engineers in electronic design.
M1-level students with advanced training in analogue and digital electronics. File includes previous-year ranking and cohort size, motivation letter, transcripts, English proof, CV and two recommendation letters. Capacity 15 places. Applications via the Inception platform (2026 window 2 February to 21 June 2026).
EUR 243 a year (2022/2023). National master registration fee set by Université Paris-Saclay for 2022/2023, same for EU and non-EU students; it is a registration fee, not a tuition amount Source
Intake: September
Engineering
CentraleSupélec, France
Engineering
CentraleSupélec, France
Engineering
CentraleSupélec, France
Engineering
CentraleSupélec, France
Engineering
CentraleSupélec, France
Engineering
CentraleSupélec, France
Engineering
CentraleSupélec, France
Engineering
CentraleSupélec, France
Book a free consultation with our expert counsellors and take the first step towards your dream university.
Copyrights © 2026 StudyMapped. All rights reserved.
Enter your credentials to continue.
Join us and start your study abroad journey.